The present invention relates generally to a method for forming a capacitor of a semiconductor device; and more particularly, to a method for forming a capacitor of a semiconductor device which can prevent a bunker defect from occurring in an interlayer dielectric when forming a cylinder type storage electrode.
Various techniques for obtaining a capacitor having high capacitance have been proposed in the art as a result of the rapid increase in the demand for semiconductor memory devices. A typical capacitor can be understood as having a structure in which a dielectric is interposed between storage electrodes and plate electrodes. The capacitance of the capacitor is proportional to the surface area of an electrode and the dielectric constant of the dielectric and is inversely proportional to the distance between electrodes, that is, the thickness of the dielectric. Methods for obtaining a capacitor having high capacitance include: using a dielectric having a high dielectric constant, increasing the surface area of an electrode, or decreasing the distance between electrodes. In this regard, limitations exist in decreasing the distance between electrodes (that is, the thickness of the dielectric). These limitations have caused researchers to look more actively in the direction of dielectrics having high dielectric constants and methods of increasing the surface area of an electrode.
In order to increase the surface area of an electrode three-dimensional structures, including concave type and cylinder type storage electrodes, are being utilized rather than simply looking at capacitors as two-dimensional elements. When comparing these types, the cylinder type storage electrode has a wider electrode area than the concave type storage electrode in which only an inner surface is utilized as an electrode area, because the cylinder type storage electrode has a CIAIC (cathode-insulator-anode-insulator-cathode) structure in which both inner and outer surfaces can be utilized as an electrode area. Therefore, the cylinder type storage electrode can be considered advantageous when applied in the manufacturing method of a semiconductor device having high capacity.
Hereafter, a conventional method for forming a capacitor of a semiconductor device having a cylinder type storage electrode will be briefly described.
First, a mold insulation layer is deposited on a semiconductor substrate having storage node contact plugs. The mold insulation member is then etched to define holes that expose the storage node contact plugs. A conductive layer comprising, for example, a TiN layer is then deposited on the mold insulation layer and the surfaces of the holes. The portions of the conductive layer deposited on the mold insulation layer are then removed, and thereafter the mold insulation layer is removed through a dip-out process to form cylinder type storage electrodes. Next, by sequentially forming a dielectric layer and plate electrodes on the storage electrodes, capacitors are formed.
However, in the conventional art as described above, the nature of the TiN layer (as the conductive layer for storage nodes) is such that the TiN layer grows into the shape of a column having large stress. Therefore, subsequent to the formation of the TiN layer (as the conductive layer for storage nodes), grain boundaries, pinholes or cracks are likely to occur in the TiN layer.
Moreover, if the TiN layer is deposited with an increased thickness in order to elevate the capacity, a phenomenon occurs in the subsequent dip-out process, in which an etchant infiltrates to the bottoms of the storage electrodes through the grain boundaries, the pinholes or the cracks in the TiN layer. Thus, when the portions of the interlayer dielectric adjacent to the bottoms of the storage electrodes are etched by the infiltrated etchant, bunker defects are caused.
As a result of the bunker defects in the interlayer dielectric, the probability of a short circuit between the storage electrodes or subsequently formed plate electrodes and the bit lines increases, and the probability of bridging between adjoining storage electrodes also increases, which in turn causes the manufacturing yield to decrease and the reliability of the semiconductor device to deteriorate.